@IEEEtranBSTCTL{bstctl:etal,
  CTLuse_forced_etal = {yes},
  CTLmax_names_forced_etal = {3},
}

@IEEEtranBSTCTL{bstctl:nodash,
  CTLdash_repeated_names = {no},
}

@IEEEtranBSTCTL{bstctl:simpurl,
  CTLname_url_prefix = {Available: },
}

@inproceedings{Kumar04,
 author = {Rakesh Kumar and Dean M. Tullsen and Parthasarathy Ranganathan and Norman P. Jouppi and Keith I. Farkas},
 title = "{Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance}",
booktitle = "{ISCA}",
 year = {2004},
 pages = {64},
 publisher = {IEEE Computer Society},
 }

@inproceedings{Kumar03,
 author = {Rakesh Kumar and Keith I. Farkas and Norman P. Jouppi and Parthasarathy Ranganathan and Dean M. Tullsen},
 title = "{Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction}",
booktitle = "{MICRO}",
 year = {2003},
 pages = {81},
 publisher = {IEEE Computer Society},
 }

@inproceedings{bLee,
 author = {Lee, Benjamin C. and Brooks, David M.},
 title = {Accurate and efficient regression modeling for microarchitectural performance and power prediction},
 booktitle = {Proceedings of the 12th international conference on Architectural support for programming languages and operating systems},
 series = {ASPLOS XII},
 year = {2006},
 location = {San Jose, California, USA},
 pages = {185--194},
 publisher = {ACM},
 address = {New York, NY, USA},
} 

@inproceedings{Kumar06,
 author = {Rakesh Kumar and Dean M. Tullsen and Norman P. Jouppi},
 title = {Core architecture optimization for heterogeneous chip multiprocessors},
booktitle = "{PACT}",
 year = {2006},
 isbn = {1-59593-264-X},
 pages = {23--32},
 location = {Seattle, Washington, USA},
 doi = {http://doi.acm.org/10.1145/1152154.1152162},
 publisher = {ACM Press},
 address = {New York, NY, USA},
 }

@misc{ARM11-WhitePaper-BigLittle,
    author = "ARM",
    title = "{Big.LITTLE Processing with ARM Cortex-A15 \& Cortex-A7}",
    year = "2011",
    url = "http://www.arm.com/",
}

@misc{nvidiaSMP,
    author = "Nvidia Corporation",
    title = "{Variable SMP (4-PLUS-1) - A Multicore CPU Architecture for Low Power and High Performance }",
    year = "2011",
    url = "http://www.nvidia.com/",
}

@MISC{samsung,
  author = {Samsung Electronics Co., LTD},
  title = {Samsung Primes Exynos 5 Octa for ARM big.LITTLE Technology with Heterogeneous Multi-Processing Capability},
  howpublished = {Press Release},
  month = {September},
  year = {2013},
  note = {\url{http://www.samsung.com/global/business/semiconductor/news-events/press-releases/detail?cateSearchParam=N009\&newsId=13021}}
}

@misc{coremark,
    author="EEMBC",
    title="Coremark",
    url="http://coremark.org/",
}

@inproceedings{Clark08-ISCA-VEAL,
 author = {Clark, Nathan and Hormati, Amir and Mahlke, Scott},
 title = {VEAL: Virtualized Execution Accelerator for Loops},
booktitle = "{ISCA}",
 year = {2008},
 isbn = {978-0-7695-3174-8},
 pages = {389--400},
 doi = {http://dx.doi.org/10.1109/ISCA.2008.33},
 publisher = {IEEE Computer Society},
 address = {Washington, DC, USA},
 }

@inproceedings{Venkatesh10-ASPLOS-CCores,
 author = {Venkatesh, Ganesh and Sampson, Jack and Goulding, Nathan and Garcia, Saturnino and Bryksin, Vladyslav and Lugo-Martinez, Jose and Swanson, Steven and Taylor, Michael Bedford},
 title = {Conservation cores: reducing the energy of mature computations},
 booktitle = "{ASPLOS '10: Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems}",
 year = {2010},
 isbn = {978-1-60558-839-1},
 pages = {205--218},
 location = {Pittsburgh, Pennsylvania, USA},
 doi = {http://doi.acm.org/10.1145/1736020.1736044},
 publisher = {ACM},
 address = {New York, NY, USA},
 }

@ARTICLE{Goulding11-IEEEMICRO-GreenDroid,
author={Goulding-Hotta, N. and Sampson, J. and Venkatesh, G. and Garcia, S. and Auricchio, J. and Huang, P. and Arora, M. and Nath, S. and Bhatt, V. and Babb, J. and Swanson, S. and Taylor, M.},
journal={IEEE Micro},
title={The {G}reen{D}roid Mobile Application Processor: An Architecture for Silicon's Dark Future},
year={2011},
month={Mar./Apr.},
volume={31},
number={2},
pages={86-95},
keywords={GreenDroid mobile application processor;dark silicon;energy efficient design;modern processor design;silicon dark future;smart phone application;elemental semiconductors;mobile computing;mobile handsets;multiprocessing systems;silicon;},
doi={10.1109/MM.2011.18},
ISSN={0272-1732},}

@inproceedings{Dennard74-JSSC-MOSFET_Scaling,
 author = {R.H. Dennard and F. H. Gaensslen and V. L. Rideout and E. Bassous and A. R. LeBlanc},
 title = "{Design of Ion-Implanted MOSFET's with Very Small Physical Dimensions}",
 booktitle = "{IEEE Journal of Solid-State Circuits}",
 year = {1974},
 month={October}
 }

@article{gem5,
 author = {Binkert, Nathan and Beckmann, Bradford and Black, Gabriel and Reinhardt, Steven K. and Saidi, Ali and Basu, Arkaprava and Hestness, Joel and Hower, Derek R. and Krishna, Tushar and Sardashti, Somayeh and Sen, Rathijit and Sewell, Korey and Shoaib, Muhammad and Vaish, Nilay and Hill, Mark D. and Wood, David A.},
 title = {The gem5 simulator},
 journal = {SIGARCH Comput. Archit. News},
 issue_date = {May 2011},
 volume = {39},
 number = {2},
 month = aug,
 year = {2011},
 issn = {0163-5964},
 pages = {1--7},
 numpages = {7},
 url = {http://doi.acm.org/10.1145/2024716.2024718},
 doi = {10.1145/2024716.2024718},
 acmid = {2024718},
 publisher = {ACM},
 address = {New York, NY, USA},
} 


@inproceedings{mcpat,
 author = {Li, Sheng and Ahn, Jung Ho and Strong, Richard D. and Brockman, Jay B. and Tullsen, Dean M. and Jouppi, Norman P.},
 title = {McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures},
 booktitle = {Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture},
 series = {MICRO 42},
 year = {2009},
 location = {New York, New York},
 pages = {469--480},
 publisher = {ACM},
 address = {New York, NY, USA},
} 

@misc{spec2000,
        author = {{Standard Performance Evaluation Corporation}},
        title = {{SPEC} {CPU} 2000 Benchmark Specifications},
        note = {{SPEC2000 Benchmark Release}},
        year = 2000
}

@misc{spec2006,
        author = {{Standard Performance Evaluation Corporation}},
        title = {{SPEC} {CPU} 2006 Benchmark Specifications},
        note = {{SPEC2006 Benchmark Release}},
        year = 2006
}

@inproceedings{Clark05-ISCA-CustomISA,
 author = {Nathan Clark and Jason Blome and Michael Chu and Scott Mahlke and Stuart Biles and Krisztian Flautner},
 title = {An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors},
booktitle = "{ISCA}",
 year = {2005},
 pages = {272--283},
 publisher = {IEEE Computer Society},
 }


@inproceedings{HOROWITZ10-ISCA-ASICcomparison,
 author = {Hameed, Rehan and Qadeer, Wajahat and Wachs, Megan and Azizi, Omid and Solomatnikov, Alex and Lee, Benjamin C. and Richardson, Stephen and Kozyrakis, Christos and Horowitz, Mark},
 title = {Understanding sources of inefficiency in general-purpose chips},
booktitle = "{ISCA}",
 year = {2010},
 pages = {37--47},
 location = {Saint-Malo, France},
 publisher = {ACM},
 address = {New York, NY, USA},
 }

@phdthesis{Chakraborty2008,
 author = {Chakraborty, Koushik},
 advisor = {Sohi, Gurindar S.},
 title = {Over-provisioned multicore systems},
 year = {2008},
 isbn = {978-0-549-80420-8},
 publisher = {University of Wisconsin at Madison},
 address = {Madison, WI, USA},
} 

@article{Dally08-CAL-ELM,
 author = {Balfour, James and Dally, William and Black-Schaffer, David and Parikh, Vishal and Park, JongSoo},
 title = {An Energy-Efficient Processor Architecture for Embedded Systems},
 journal = {IEEE Comput. Archit. Lett.},
 volume = {7},
 number = {1},
 year = {2008},
 issn = {1556-6056},
 pages = {29--32},
 doi = {http://dx.doi.org/10.1109/L-CA.2008.1},
 publisher = {IEEE Computer Society},
 address = {Washington, DC, USA},
 }

@inproceedings{Sherwood01-PACT-Simpoint,
 author = {Sherwood, Timothy and Perelman, Erez and Calder, Brad},
 title = {Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications},
booktitle = "{PACT}",
 year = {2001},
 isbn = {0-7695-1363-8},
 pages = {3--14},
 publisher = {IEEE Computer Society},
 address = {Washington, DC, USA},
 }

@phdthesis{Chakraborty08-THESIS-OverprovisionedCores,
author={Koushik Chakraborty},
title="{Over-provisioned Multicore System}",
school={University of Wisconsin-Madison},
year={2008},
}

@inproceedings{Esmaeilzadeh11-ISCA-DarkSilicon,
  title={Dark Silicon and the End of Multicore Scaling},
  author={Esmaeilzadeh, H. and Blem, E. and Amant, R.S. and Sankaralingam, K. and Burger, D.},
booktitle = "{ISCA}",
  year={2011}
}

@inproceedings{pin,
 author = {Luk, Chi-Keung and Cohn, Robert and Muth, Robert and Patil, Harish and Klauser, Artur and Lowney, Geoff and Wallace, Steven and Reddi, Vijay Janapa and Hazelwood, Kim},
 title = {Pin: building customized program analysis tools with dynamic instrumentation},
 booktitle = {Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation},
 series = {PLDI '05},
 year = {2005},
 isbn = {1-59593-056-6},
 location = {Chicago, IL, USA},
 pages = {190--200},
 numpages = {11},
 url = {http://doi.acm.org/10.1145/1065010.1065034},
 doi = {10.1145/1065010.1065034},
 acmid = {1065034},
 publisher = {ACM},
 address = {New York, NY, USA},
 keywords = {dynamic compilation, instrumentation, program analysis tools},
}

@inproceedings{Kim09-MICRO-Qilin,
  title={Qilin: exploiting parallelism on heterogeneous multiprocessors with adaptive mapping},
  author={Luk, C.K. and Hong, S. and Kim, H.},
  booktitle="{Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture}",
  pages={45--55},
  year={2009},
  organization={ACM}
}

@ARTICLE{Hoste07-IEEEMICRO-MICA, 
author={Hoste, K. and Eeckhout, L.}, 
journal={Micro, IEEE}, 
title={Microarchitecture-Independent Workload Characterization}, 
year={2007}, 
volume={27}, 
number={3}, 
pages={63-72}, 
keywords={computer architecture;microprogramming;computer designers;computer systems;microarchitecture-independent workload characterization;microprocessor design;Application software;Biometrics;Computational modeling;Counting circuits;Design optimization;Hardware;Microarchitecture;Microprocessors;Performance analysis;Solids;measurement techniques;modeling techniques;performance attributes;workload characterization}, 
doi={10.1109/MM.2007.56}, 
ISSN={0272-1732},}

@article{Shelepov09-SIGOPS-HeteroScheduling,
 author = {Shelepov, Daniel and Saez Alcaide, Juan Carlos and Jeffery, Stacey and Fedorova, Alexandra and Perez, Nestor and Huang, Zhi Feng and Blagodurov, Sergey and Kumar, Viren},
 title = {HASS: a scheduler for heterogeneous multicore systems},
 journal = {SIGOPS Oper. Syst. Rev.},
 issue_date = {April 2009},
 volume = {43},
 number = {2},
 month = apr,
 year = {2009},
 issn = {0163-5980},
 pages = {66--75},
 numpages = {10},
 url = {http://doi.acm.org/10.1145/1531793.1531804},
 doi = {10.1145/1531793.1531804},
 acmid = {1531804},
 publisher = {ACM},
 address = {New York, NY, USA},
 keywords = {architectural signatures, asymmetric, heterogeneous, multicore, scheduling},
} 

@article{weka,
 author = {Hall, Mark and Frank, Eibe and Holmes, Geoffrey and Pfahringer, Bernhard and Reutemann, Peter and Witten, Ian H.},
 title = {The WEKA data mining software: an update},
 journal = {SIGKDD Explor. Newsl.},
 issue_date = {June 2009},
 volume = {11},
 number = {1},
 month = nov,
 year = {2009},
 issn = {1931-0145},
 pages = {10--18},
 numpages = {9},
 url = {http://doi.acm.org/10.1145/1656274.1656278},
 doi = {10.1145/1656274.1656278},
 acmid = {1656278},
 publisher = {ACM},
 address = {New York, NY, USA},
} 

@inproceedings{Lukefahr12-MICRO-CompositeCores,
 author = {Lukefahr, Andrew and Padmanabha, Shruti and Das, Reetuparna and Sleiman, Faissal M. and Dreslinski, Ronald and Wenisch, Thomas F. and Mahlke, Scott},
 title = {Composite Cores: Pushing Heterogeneity Into a Core},
 booktitle = {Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture},
 series = {MICRO '12},
 year = {2012},
 isbn = {978-0-7695-4924-8},
 pages = {317--328},
 numpages = {12},
 url = {http://dx.doi.org/10.1109/MICRO.2012.37},
 doi = {10.1109/MICRO.2012.37},
 acmid = {2457508},
 publisher = {IEEE Computer Society},
 address = {Washington, DC, USA},
 keywords = {heterogeneous architecture, core microarchitecure, split pipelines, reactive controller},
} 

@inproceedings{horowitz,
 author = {Azizi, Omid and Mahesri, Aqeel and Lee, Benjamin C. and Patel, Sanjay J. and Horowitz, Mark},
 title = {Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis},
 booktitle = {Proceedings of the 37th annual international symposium on Computer architecture},
 series = {ISCA '10},
 year = {2010},
 location = {Saint-Malo, France},
 pages = {26--36},
 acmid = {1815967},
 publisher = {ACM},
 address = {New York, NY, USA},
} 

@article{subsettingSPEC,
 author = {Phansalkar, Aashish and Joshi, Ajay and John, Lizy K.},
 title = {Subsetting the SPEC CPU2006 benchmark suite},
 journal = {SIGARCH Comput. Archit. News},
 issue_date = {March 2007},
 volume = {35},
 number = {1},
 month = mar,
 year = {2007},
 issn = {0163-5964},
 pages = {69--76},
 numpages = {8},
 url = {http://doi.acm.org/10.1145/1241601.1241616},
 doi = {10.1145/1241601.1241616},
 acmid = {1241616},
 publisher = {ACM},
 address = {New York, NY, USA},
} 

@phdthesis{ parsec,
  author = {Christian Bienia},
  title = {Benchmarking Modern Multiprocessors},
  school = {Princeton University},
  year      = {2011},
  month     = {January}
}

@inproceedings{mibench,
 author = {Guthaus, M. R. and Ringenberg, J. S. and Ernst, D. and Austin, T. M. and Mudge, T. and Brown, R. B.},
 title = {MiBench: A free, commercially representative embedded benchmark suite},
 booktitle = {Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop},
 series = {WWC '01},
 year = {2001},
 isbn = {0-7803-7315-4},
 pages = {3--14},
 numpages = {12},
 url = {http://dx.doi.org/10.1109/WWC.2001.15},
 doi = {10.1109/WWC.2001.15},
 acmid = {1128563},
 publisher = {IEEE Computer Society},
 address = {Washington, DC, USA},
} 

@article{PIE,
 author = {Van Craeynest, Kenzo and Jaleel, Aamer and Eeckhout, Lieven and Narvaez, Paolo and Emer, Joel},
 title = {Scheduling heterogeneous multi-cores through Performance Impact Estimation (PIE)},
 journal = {SIGARCH Comput. Archit. News},
 issue_date = {June 2012},
 volume = {40},
 number = {3},
 month = jun,
 year = {2012},
 issn = {0163-5964},
 pages = {213--224},
 numpages = {12},
 url = {http://doi.acm.org/10.1145/2366231.2337184},
 doi = {10.1145/2366231.2337184},
 acmid = {2337184},
 publisher = {ACM},
 address = {New York, NY, USA},
} 

@inproceedings{EXOCHI,
 author = {Wang, Perry H. and Collins, Jamison D. and Chinya, Gautham N. and Jiang, Hong and Tian, Xinmin and Girkar, Milind and Yang, Nick Y. and Lueh, Guei-Yuan and Wang, Hong},
 title = {EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system},
 booktitle = {Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation},
 series = {PLDI '07},
 year = {2007},
 isbn = {978-1-59593-633-2},
 location = {San Diego, California, USA},
 pages = {156--166},
 numpages = {11},
 url = {http://doi.acm.org/10.1145/1250734.1250753},
 doi = {10.1145/1250734.1250753},
 acmid = {1250753},
 publisher = {ACM},
 address = {New York, NY, USA},
 keywords = {GPU, heterogeneous multi-cores, openMP},
} 

@article{scalableCUDA,
 author = {Nickolls, John and Buck, Ian and Garland, Michael and Skadron, Kevin},
 title = {Scalable Parallel Programming with CUDA},
 journal = {Queue},
 issue_date = {March/April 2008},
 volume = {6},
 number = {2},
 month = mar,
 year = {2008},
 issn = {1542-7730},
 pages = {40--53},
 numpages = {14},
 url = {http://doi.acm.org/10.1145/1365490.1365500},
 doi = {10.1145/1365490.1365500},
 acmid = {1365500},
 publisher = {ACM},
 address = {New York, NY, USA},
} 

@inproceedings{brook,
 author = {Buck, Ian and Foley, Tim and Horn, Daniel and Sugerman, Jeremy and Fatahalian, Kayvon and Houston, Mike and Hanrahan, Pat},
 title = {Brook for GPUs: stream computing on graphics hardware},
 booktitle = {ACM SIGGRAPH 2004 Papers},
 series = {SIGGRAPH '04},
 year = {2004},
 location = {Los Angeles, California},
 pages = {777--786},
 numpages = {10},
 url = {http://doi.acm.org/10.1145/1186562.1015800},
 doi = {10.1145/1186562.1015800},
 acmid = {1015800},
 publisher = {ACM},
 address = {New York, NY, USA},
 keywords = {Data Parallel Computing, GPU Computing, Brook, Programmable Graphics Hardware, Stream Computing},
} 

@INPROCEEDINGS{sampson-HPCA-ECOCORES, 
author={Sampson, J. and Venkatesh, G. and Goulding-Hotta, N. and Garcia, S. and Swanson, S. and Taylor, M.B.}, 
booktitle={High Performance Computer Architecture (HPCA), 2011 IEEE 17th International Symposium on}, 
title={Efficient complex operators for irregular codes}, 
year={2011}, 
pages={491-502}, 
keywords={cache storage;coprocessors;pipeline processing;L0 cache;c-cores;cachelets;complex fat operators;conservation cores;coprocessors;critical path length;irregular codes;load-use delay;selective depipelining technique;Clocks;Hardware;Memory management;Pipeline processing;Registers;Silicon}, 
doi={10.1109/HPCA.2011.5749754}, 
ISSN={1530-0897},}

@inproceedings{Vasilieospeakpowermicro2010,
 author = {Kontorinis, Vasileios and Shayan, Amirali and Tullsen, Dean M. and Kumar, Rakesh},
 title = {Reducing peak power with a table-driven adaptive processor core},
 booktitle = {Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture},
 series = {MICRO 42},
 year = {2009},
 isbn = {978-1-60558-798-1},
 location = {New York, New York},
 pages = {189--200},
 numpages = {12},
 url = {http://doi.acm.org/10.1145/1669112.1669137},
 doi = {10.1145/1669112.1669137},
 acmid = {1669137},
 publisher = {ACM},
 address = {New York, NY, USA},
 keywords = {adaptive architectures, decoupling capacitance, peak power, resource resizing, voltage variation},
} 

@article{10x10,
  title={The 10x10 Foundation for Heterogeneity: Clustering Applications by Computation and Memory Behavior},
  author={Guha, Apala and Cicotti, Pietro and Snavely, Allan and Chien, Andrew A},
  journal={University of Chicago, Tech. Rep. TR-2012-01},
  year={2012}
}

@article{variable2011multi,
  title={A multi-core CPU architecture for low power and high performance},
  author={Variable, SMP},
  journal={Whitepaper-http://www. nvidia. com},
  year={2011}
}

